Some Mach64-related constants
Marcel Sondaar
Public Domain
| mach64_id.bas | Some Mach64-related constants |
| Mach64_devids | Lists the PCI Device IDs that are based on the mach64 core. |
| Mach64_regs | A list of the Mach64 registers Note: some registers may not be present on all controllers, and some may be missing altogether. |
| Constants | |
| CRTC_H_TOTAL_DISP | 32-bit register holding the horizontal counter settings |
| CRTC_H_SYNC_STRT_WID | 32-bit register holding the hsync pulse settings |
| CRTC_V_TOTAL_DISP | 32-bit register holding the vertical counter settings |
| CRTC_V_SYNC_STRT_WID | 32-bit register holding the vsync pulse settings |
| CRTC_VLINE_CRNT_VLINE | 32-bit register holding the current vertical counter and reference counter. |
| CRTC_OFF_PITCH | 32-bit register holding the screen offset and virtual width |
| CRTC_GEN_CNTL | 32-bit register for general CRTC configuration. |
| DSP_CONFIG | 32-bit register for the DSP (undocumented) |
| DSP_ON_OFF | 32-bit register for the DSP (undocumented) |
| OVR_WID_LEFT_RIGHT | 32-bit register holding the size of the horizontal overscan area |
| OVR_WID_TOP_BOTTOM | 32-bit register holding the size of the vertical overscan area |
| CLOCK_CNTL | 8-bit register for external clock control. |
| CLOCK_CNTL_ADDR | 8-bit register for addressing a register of the integrated clock generator (undocumented) |
| CLOCK_CNTL_DATA | 8-bit register for accessing a register of the integrated clock generator (undocumented) |
| BUS_CNTL | 32-bit register for configuring the internal and external buses |
| EXT_MEM_CNTL | 32-bit register for memory configuration |
| MEM_CNTL | 32-bit register for memory configuration |
| DAC_W_INDEX | 8-bit register for selecting the DAC entry to write to. |
| DAC_DATA | 8-bit register for reading/writing the contents of the DAC |
| DAC_MASK | 8-bit register containing the mask to be applied to color indices prior to lookup in the DAC |
| DAC_R_INDEX | 8-bit register for selecting the DAC entry to read from. |
| DAC_CNTL | 32-bit register for general DAC configuration |
| GEN_TEST_CNTL | 32-bit register for general engine and test settings. |
| Mach64_crtc_gen_cntl | Lists the fields in the Mach64_regs.CRTC_GEN_CNTL register |
| Constants | |
| CRTC_EXT_DISP_EN | allows the programmer to switch between the VGA and native CRTC |
| CRTC_EN | enables the CRTC when set, resets the CRTC when clear. |
| Mach64_clock_regs | Lists the registers of the integrated clock |
| Mach64_gen_test_cntl | Lists the fields of the Mach64_regs.GEN_TEST_CNTL register |
| Mach64_bus_cntl | Lists the fields of the Mach64_regs.BUS_CNTL register |
Lists the PCI Device IDs that are based on the mach64 core.
Currently this list is short because there are minor differences between ‘64s that can break drivers, and the code hasn’t been tested thoroughly
A list of the Mach64 registers Note: some registers may not be present on all controllers, and some may be missing altogether.
| Constants | |
| CRTC_H_TOTAL_DISP | 32-bit register holding the horizontal counter settings |
| CRTC_H_SYNC_STRT_WID | 32-bit register holding the hsync pulse settings |
| CRTC_V_TOTAL_DISP | 32-bit register holding the vertical counter settings |
| CRTC_V_SYNC_STRT_WID | 32-bit register holding the vsync pulse settings |
| CRTC_VLINE_CRNT_VLINE | 32-bit register holding the current vertical counter and reference counter. |
| CRTC_OFF_PITCH | 32-bit register holding the screen offset and virtual width |
| CRTC_GEN_CNTL | 32-bit register for general CRTC configuration. |
| DSP_CONFIG | 32-bit register for the DSP (undocumented) |
| DSP_ON_OFF | 32-bit register for the DSP (undocumented) |
| OVR_WID_LEFT_RIGHT | 32-bit register holding the size of the horizontal overscan area |
| OVR_WID_TOP_BOTTOM | 32-bit register holding the size of the vertical overscan area |
| CLOCK_CNTL | 8-bit register for external clock control. |
| CLOCK_CNTL_ADDR | 8-bit register for addressing a register of the integrated clock generator (undocumented) |
| CLOCK_CNTL_DATA | 8-bit register for accessing a register of the integrated clock generator (undocumented) |
| BUS_CNTL | 32-bit register for configuring the internal and external buses |
| EXT_MEM_CNTL | 32-bit register for memory configuration |
| MEM_CNTL | 32-bit register for memory configuration |
| DAC_W_INDEX | 8-bit register for selecting the DAC entry to write to. |
| DAC_DATA | 8-bit register for reading/writing the contents of the DAC |
| DAC_MASK | 8-bit register containing the mask to be applied to color indices prior to lookup in the DAC |
| DAC_R_INDEX | 8-bit register for selecting the DAC entry to read from. |
| DAC_CNTL | 32-bit register for general DAC configuration |
| GEN_TEST_CNTL | 32-bit register for general engine and test settings. |
32-bit register holding the current vertical counter and reference counter.
documented in vgadoc
32-bit register for general CRTC configuration.
documented in vgadoc. See Mach64_crtc_gen_cntl
32-bit register for the DSP (undocumented)
| bits 00-15 | dsp_xclks |
| bits 16-19 | dsp_loop_latency |
| bits 20-31 | dsp_precision |
32-bit register holding the size of the horizontal overscan area
documented in vgadoc
32-bit register holding the size of the vertical overscan area
documented in vgadoc
8-bit register for external clock control.
VGADOC disagrees and labels it 32 bit which is technically wrong. It will probably work happily on a 88800GX though
more info on this register as found in 88800s is in VGADOC
it seems that on integrated versions this is used for selecting the CRTC clock
8-bit register for addressing a register of the integrated clock generator (undocumented)
| bit 0 | Undefined |
| bit 1 | Start write cycle. Set this bit prior to write, write the data to CLOCK_CNTL_DATA, then reload this register with the bit cleared again. |
| bit 2-7 | Clock register index. See Mach64_clock_regs |
8-bit register for accessing a register of the integrated clock generator (undocumented)
| bit 0-7 | data bits |
32-bit register for memory configuration
not documented, set by linux for all later Mach64s. Only written with magic values.
32-bit register for memory configuration
partially documented in vgadoc, partially undocumented.
8-bit register for selecting the DAC entry to write to.
Mirrors the corresponding VGA register.
8-bit register for reading/writing the contents of the DAC
Mirrors the corresponding VGA register.
8-bit register containing the mask to be applied to color indices prior to lookup in the DAC
Mirrors the corresponding VGA register.
8-bit register for selecting the DAC entry to read from.
Mirrors the corresponding VGA register.
32-bit register for general DAC configuration
partially documented in vgadoc, partially undocumented.
Lists the fields in the Mach64_regs.CRTC_GEN_CNTL register
| Constants | |
| CRTC_EXT_DISP_EN | allows the programmer to switch between the VGA and native CRTC |
| CRTC_EN | enables the CRTC when set, resets the CRTC when clear. |
allows the programmer to switch between the VGA and native CRTC
set to enable the accelerated CRTC
Lists the registers of the integrated clock
the register is to be shifted left by 2 then filled in Mach64_regs.CLOCK_CNTL_ADDR
Lists the fields of the Mach64_regs.GEN_TEST_CNTL register
Lists the fields of the Mach64_regs.BUS_CNTL register