Index - MOS

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V
	v, swblit
	va_arg
	va_copy
	va_end
	va_start
	Variables Global libc/ interface/ ia-pc/ allocpages.c libc/ interface/ ia32-pc/ allocpages.c libfb/ rtlib/ libfb_init_nullstring.c modules/ experimental/ quickkey.bas modules/ gfx/ font8_8.asm modules/ gfx/ vbe/ vbemon.bas modules/ keyboard.bas modules/ storage/ diskmm.bi modules/ storage/ diskmm.h _PDCLIB_div_t include/ amd64-host/ _PDCLIB_config.h include/ ia-pc/ _PDCLIB_config.h include/ ia32-pc/ _PDCLIB_config.h include/ m68k-megadrive/ _PDCLIB_config.h _PDCLIB_ldiv_t include/ amd64-host/ _PDCLIB_config.h include/ ia-pc/ _PDCLIB_config.h include/ ia32-pc/ _PDCLIB_config.h include/ m68k-megadrive/ _PDCLIB_config.h _PDCLIB_lldiv_t include/ amd64-host/ _PDCLIB_config.h include/ ia-pc/ _PDCLIB_config.h include/ ia32-pc/ _PDCLIB_config.h include/ m68k-megadrive/ _PDCLIB_config.h COMMPORT include/ amd64-host/ mos/ drivercom.h include/ common/ mos/ drivercom.h MCObject MCQueryUtility mos_buf_impl_t mos_buf_part_t mos_buf_t mos_buf_tag_t mos_mmio_pio_impl_tmos_pio_impl_t include/ common/ udi_env.h libudi/ include/ udi_env.bi mos_procinfo mos_system_cb_t udi_block_bind_cb_t udi_block_xfer_cb_t udi_blockmap_map_cb_t udi_blockmap_mgmt_cb_t udi_blockmap_xfer_cb_t udi_fs_blockread_bind_cb_t udi_fs_blockread_close_cb_t udi_fs_blockread_filename_cb_t udi_fs_blockread_map_cb_t udi_fs_blockrw_bind_cb_tudi_gfx_bind_cb_t include/ common/ udi_gfx.h include/ common/ udi_gfx1.h udi_gfx_buffer_cb_tudi_gfx_command_cb_t include/ common/ udi_gfx.h include/ common/ udi_gfx1.h udi_gfx_range_cb_t include/ common/ udi_gfx.h include/ common/ udi_gfx1.h udi_gfx_state_cb_t include/ common/ udi_gfx.h include/ common/ udi_gfx1.h
	VerifyMicrocode
	VERITE_CRTCCTL, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_CRTCH, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_CRTCV, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_DAC_CR0, VREGS
	VERITE_DAC_CR1, VREGS
	VERITE_DAC_CR2, VREGS
	VERITE_DAC_PIXELMASK, VREGS
	VERITE_DOTCLOCK, VREGS
	VERITE_FRAMESTART, VREGS
	VERITE_GPUCTL, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_GPUDATA, VREGS
	VERITE_GPUINDEX, VREGS
	VERITE_GPUSTAT, VREGS
	VERITE_MEMENDIAN, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_MODE, VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas
	VERITE_WIDTH, VREGS
	VGAEnableDisplay modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASet320x200Mode modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASet320x240Mode modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASet400x300Mode modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASet640x480x16Mode modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASetModeX modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGASetTextMode modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VGAUnlockCRTC modules/ gfx/ vga_io.bas modules/ vga_io.bas
	VINSN_ADD, VINSNS
	VINSN_ADDI, VINSNS
	VINSN_AND, VINSNS
	VINSN_ANDI, VINSNS
	VINSN_ANDN, VINSNS
	VINSN_ANDNI, VINSNS
	VINSN_JA, VINSNS
	VINSN_JMP, VINSNS
	VINSN_JMPR, VINSNS
	VINSN_JNA, VINSNS
	VINSN_JNS, VINSNS
	VINSN_JNZ, VINSNS
	VINSN_JS, VINSNS
	VINSN_JZ, VINSNS
	VINSN_LDH, VINSNS
	VINSN_LDHI, VINSNS
	VINSN_LDI, VINSNS
	VINSN_LDW, VINSNS
	VINSN_NOR, VINSNS
	VINSN_NORI, VINSNS
	VINSN_OR, VINSNS
	VINSN_ORI, VINSNS
	VINSN_RFIFO, VINSNS
	VINSN_RORI, VINSNS
	VINSN_RSUB, VINSNS
	VINSN_RSUBI, VINSNS
	VINSN_SARI, VINSNS
	VINSN_SHLI, VINSNS
	VINSN_SHRI, VINSNS
	VINSN_SUB, VINSNS
	VINSN_SUBI, VINSNS
	VINSN_XOR, VINSNS
	VINSN_XORI, VINSNS
	VINSNS
	vmstub
	VOODOOREGS
	VREGS modules/ gfx/ verite/ verite.bi modules/ test_v2k.bas

Custom verite firmware capable of performing on-device blitting

returns the next passed argument

duplicates an va_list variable

cleans up an va_list structure

fills an va_list structure with the info to the extra arguments

Attempts to proof that the microcode conforms to all invariants of the system.

CRTC Control register.

Horizontal timing register

Vertical timing register

RAMDAC configuration

Access to the V2x00 dot clock PLL

Frame offset

This register controls the state of the RISC processor It holds several bitflags:

This register contains the value of the GPU register selected by VERITE_GPUINDEX.

index register to the GPU external registers

This register contains the current status of the device Only present on V2x00

This register controls the byteswapping performed when writing to the linear framebuffer.

This register allows one to select between CRTC modes.

Virtual width?

Sub VGAEnableDisplay Cdecl Alias "VGAEnableDisplay" ()

Enables video output on the VGA

Sub VGASet320x200Mode Cdecl Alias "VGASet320x200Mode" ()

Set the VGA registers to a 320x200 Mode

Sub VGASet320x240Mode Cdecl Alias "VGASet320x240Mode"()

Set the VGA registers to a 320x240 Mode

Sub VGASet400x300Mode Cdecl Alias "VGASet400x300Mode"()

Set the VGA registers to a 400x300 Mode

Sub VGASet640x480x16Mode Cdecl Alias "VGASet640x480x16Mode"()

Set the VGA registers to 640x480 16 colors

Sub VGASetModeX Cdecl Alias "VGASetModeX"()

Modifies the CRTC and Sequencer to enter planar addressing mode from a linear mode

Sub VGASetTextMode Cdecl Alias "VGASetTextMode" ()

Set the VGA registers to standard text mode

Sub VGAUnlockCRTC Cdecl Alias "VGAUnlockCRTC" ()

unlocks the CRTC registers

add two registers and put the result in the target register

Add a register and a byte immediate

compute the binary and of two registers and put the result in the target register

Computes the inclusive or of a register and a byte immediate

compute the and-not of two registers and put the result in the target register

Computes the binary and-not of a register and a byte immediate

Jump conditional if register is above zero

Jump to an absolute address

Jump to address specified in register

Jump conditional if register is not above zero

Jump conditional if register is not negative

Jump conditional if register is non-zero

Jump conditional if register is negative

Jump conditional if register is zero

Load a 16-bit halfword from RAM.

Load a shifted 16-bit immediate into the selected register.

Load an 16-bit immediate into the selected register

Load a 32-bit word from RAM.

compute the binary nor two registers and put the result in the target register

Computes the binary nor of a register and a byte immediate

compute the binary inclusive or of two registers and put the result in the target register

Computes the inclusive or of a register and a byte immediate

Pops a slot from the FIFO, stall if the fifo is empty.

rotate register right by a constant number of positions.

subtract the first source register from the second source register and put the result in the target register

Subtract a register from a byte immediate

shift register right by a constant number of positions, sign extending in the process.

shift register right by a constant number of positions, adding zeros on the far end

subtract the second source from the first source register and put the result in the target register

Subtract a byte immediate from a register

compute the binary exclusive or of two registers and put the result in the target register

Computes the exclusive or of a register and a byte immediate

List of verite GPU opcodes Each instruction is exactly 32-bits, of the form ooxxxxxx, where oo is the opcode and xx are the arguments Most opcodes follow a triadic instruction: ooddxxyy, where dd is destination register, xx and yy are source registers Jumps are pipelined and therefore have a delay of a cycle.

Dim Shared vmstub As Byte Ptr

contains the location where the real mode stub is located

Registers for the Voodoo 1 graphics cards

Registers common to all Verite-based boards